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ML2004IP Fiches technique(PDF) 5 Page - Fairchild Semiconductor

No de pièce ML2004IP
Description  Logarithmic Gain/Attenuator
PDF  11 Pages
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Fabricant  FAIRCHILD [Fairchild Semiconductor]
Site Internet  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

ML2004IP Fiches technique(HTML) 5 Page - Fairchild Semiconductor

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PRODUCT SPECIFICATION
ML2003, ML2004
REV. 1.1.1 3/19/01
5
Timing Diagram
Figure 1. Serial Mode Timing Diagram
SCK
tSCK
tSCK
tS
tIS
tIH
tOS
tOH
tIPW
tOPW
tPLD
tD
tH
SID
SOD
SCK
LATI
LATO
SOD
TIMING PARAMETERS ARE REFERENCED TO THE 1.4 VOLT MIDPOINT.
Typical Performance Curves
Figure 2. Amplitude vs Frequency (VIN/VOUT = .5VRMS)
Figure 3. Amplitude vs Frequency (VIN/VOUT = 2VRMS)
0
0
-0.5
FREQUENCY (Hz)
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
-0.40
-0.45
-0.50
100
1K
10K
100K
-0.5
FREQUENCY (Hz)
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
-0.40
-0.45
-0.50
100
1K
10K
100K
ATTEN: VIN = 0.5VRMS
GAIN: VIN = 0.5VRMS/GAIN SETTING
ATTEN: VIN = 2VRMS
GAIN: VIN = 2VRMS/GAIN SETTING
GAIN = +24dB
GAIN = +18dB
GAIN = +12dB
GAIN = +0, -24dB
GAIN = +24dB
GAIN = 0dB
GAIN = –24dB



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