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L6470PD Fiches technique(PDF) 15 Page - STMicroelectronics |
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L6470PD Fiches technique(HTML) 15 Page - STMicroelectronics |
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15 / 70 page ![]() L6470 Electrical characteristics Doc ID16737 Rev 5 15/70 tcpwu Charge pump power-on and wake-up time Power bridges disabled, Cp = 10 nF, Cboot = 220 nF 650 μs Internal voltage regulator VREG Voltage regulator output voltage 2.9 3 3.2 V IREG Voltage regulator output current 40 mA VREG, drop Voltage regulator output voltage drop IREG = 40 mA 50 mV IREG,STBY Voltage regulator standby output current 10 mA Integrated analog-to-digital converter NADC Analog-to-digital converter resolution 5 bit VADC,ref Analog-to-digital converter reference voltage VRE G V fS Analog-to-digital converter sampling frequency fPWM kHz 1. Accuracy depends on oscillator frequency accuracy. 2. Tested at 25 °C in a restricted range and guaranteed by characterization. 3. Rise and fall time depends on motor supply voltage value. Refer to SRout values in order to evaluate the actual rise and fall time. 4. Not valid for STBY/RST pin which has internal pull-down resistor. 5. Not valid for SW and CS pins which have internal pull-up resistors. 6. FLAG, BUSY and SYNC open drain outputs included. 7. See Figure 18 – SPI timings diagram for details. Table 5. Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit |
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