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ADP5063ACPZ-1-R7 Fiches technique(PDF) 38 Page - Analog Devices |
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ADP5063ACPZ-1-R7 Fiches technique(HTML) 38 Page - Analog Devices |
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38 / 44 page ![]() ADP5063 Data Sheet Rev. 0 | Page 38 of 44 PCB LAYOUT GUIDELINES Figure 37. Reference Circuit Diagram Figure 38. Reference PCB Floor Plan 9 VDDIO 10 11 13 14 19 7 6 1 17 20 5 3 18 VIN1 TO VIN3 CBP SCL SDA ISO_S1 TO ISO_S3 ISO_B1 TO ISO_B3 SYS_EN AGND DIG_IO1 DIG_IO2 DIG_IO3 THR 4 BAT_SNS TO MCU TO MCU TO MCU TO MCU/NC TO MCU/NC CHARGER CONTROL BLOCK R5 NTC 10kΩ (OPTIONAL) CONNECT CLOSE TO BATTERY + 8 12 2 TO MCU/NC 15 ILED VLED 16 VDDIO R4 10kΩ R2 1.5kΩ R1 1.5kΩ C4 10µF GRM21BR6E106MA73 C1 100nF GRM155R70J104KA01 VIN = 4V TO 7V C3 22µF GRM31CR60J226ME19 C2 22µF GRM31CR60J22ME19 ADP5063 20-LEAD LFCSP VINx PGND PGND PGND ISO_Bx ISO_Sx C4: 10µF, 25V/X5R, 0805 C3: 22µF, 16V/X5R, 1206 C2: 22µF, 16V/X5R, 1206 C1: 100nF, 16V/X7R, 0402 |
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