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LAN8720AI Fiches technique(PDF) 69 Page - SMSC Corporation |
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LAN8720AI Fiches technique(HTML) 69 Page - SMSC Corporation |
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69 / 79 page ![]() Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support Datasheet SMSC LAN8720A/LAN8720Ai 69 Revision 1.4 (08-23-12) DATASHEET 5.5.2 Power Sequence Timing This diagram illustrates the device power sequencing requirements. The VDDIO, VDD1A, VDD2A and magnetics power supplies can turn on in any order provided they all reach operational levels within the specified time period tpon. Device power supplies can turn off in any order provided they all reach 0 volts within the specified time period poff. Note: When the internal regulator is disabled, a power-up sequencing relationship exists between VDDCR and the 3.3V power supply. For additional information refer to Section 3.7.3, "REGOFF: Internal +1.2V Regulator Configuration," on page 32. Figure 5.2 Power Sequence Timing Table 5.7 Power Sequence Timing Values SYMBOL DESCRIPTION MIN TYP MAX UNITS tpon Power supply turn on time 50 mS tpoff Power supply turn off time 500 mS VDDIO Magnetics Power tpon tpoff VDD1A, VDD2A |
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