© 2000 Fairchild Semiconductor Corporation

DS010250

www.fairchildsemi.com

October 1989

Revised August 2000

100343

Low Power 8-Bit Latch

General Description

The 100343 contains eight D-type latches, individual

latch enable pin (LE). A Q output follows its D input when

both E and LE are LOW. When either E or LE (or both) are

HIGH, a latch stores the last valid data present on its D

input prior to E or LE going HIGH.

The 100343 outputs are designed to drive a 50

Ω termina-

tion resistor to

−2.0V. All inputs have 50 kΩ pull-down

resistors.

Features

s Low power operation

s 2000V ESD protection

s Voltage compensated operating range

= −4.2V to −5.7V

s Available to industrial grade temperature range

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Connection Diagrams

24-Pin DIP

28-Pin PLCC

Order Number

Package Number

Package Description

100343PC

N24E

24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

100343QC

V28A

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

100343QI

V28A

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Industrial Temperature Range (

−40°C to +85°C)

Pin Names

Description

Data Inputs

E

Enable Input

LE

Latch Enable Input

Data Inputs

NC

No Connect