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ACRICH2 Fiches technique(PDF) 12 Page - Seoul Semiconductor |
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ACRICH2 Fiches technique(HTML) 12 Page - Seoul Semiconductor |
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12 / 16 page ![]() 서식번호 : SSC- QP- 7- 07- 25 (Rev.00) Rev. 00 Rev. 00 August 2011 August 2011 www.Acrich.com www.Acrich.com 12 Fig 15. EMI Reduction Circuit Table 5. EMI Standard 2.5 EMI Reduction Circuit To reduce EMI, a MLCC (Multi Layer Ceramic Capacitor) can be connected in parallel with MOV 2. Acrich IC Module Circuit Configurations Acrich2 module L N AC line voltage SPC EMI Reduction L N Standard EMI Frequency EN55015 / CISPR15 Conducted Emission 9kHz ~ 30MHz Radiated Emission 30MHz ~ 300MHz [1] Capacitor type & capacitance value can be changed by an electrical performance (Power Factor, THD, etc…) Table 6.Selection table of MLCC[1] to meet the EMI standard Voltage 4W module 8W module 12W module 16W module 100V/120V Needless Need Need Need 220V/230V/240V Needless Needless Need Need |
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