AD6623BCSLASHPCB datasheet(14/40 Pages) AD

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AD6623

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196-PIN FUNCTION DESCRIPTIONS

Mnemonic

Type

Function

POWER SUPPLY

VDD

2.5 V Supply

VDDIO

3.3 V IO Supply

GND

Ground

INPUTS

INOUT[17:0]

I/O

A Input Data (Mantissa)

QIN

When HIGH Indicates Q Input Data (Complex Input Mode)

RESET2

Active LOW Reset Pin

CLK

Input Clock

SYNC0

All Sync Pins Go to All Four Output Channels

SYNC1

All Sync Pins Go to All Four Output Channels

SYNC2

All Sync Pins Go to All Four Output Channels

SYNC3

All Sync Pins Go to All Four Output Channels

SDINA

Serial Data Input—Channel A

SDINB

Serial Data Input—Channel B

SDINC

Serial Data Input—Channel C

SDIND

Serial Data Input—Channel D

Active LOW Chip Select

CONTROL

SCLKA

I/O

Bidirectional Serial Clock—Channel A

SCLKB

I/O

Bidirectional Serial Clock—Channel B

SCLKC

I/O

Bidirectional Serial Clock—Channel C

SCLKD

I/O

Bidirectional Serial Clock—Channel D

SDFOA

Serial Data Frame Sync Output—Channel A

SDFOB

Serial Data Frame Sync Output—Channel B

SDFOC

Serial Data Frame Sync Output—Channel C

SDFOD

Serial Data Frame Sync Output—Channel D

SDFIA

Serial Data Frame Input—Channel A

SDFIB

Serial Data Frame Input—Channel B

SDFIC

Serial Data Frame Input—Channel C

SDFID

Serial Data Frame Input—Channel D

OEN

Active High Output Enable Pin

MICROPORT CONTROL

D[7:0]

I/O/T

Bidirectional Microport Data

A[2:0]

Microport Address Bus

DS (RD)

Active Low Data Strobe (Active Low Read)

DTACK (RDY)2

O/T

Active Low Data Acknowledge (Microport Status Bit)

RW (

WR)

Read Write (Active Low Write)

MODE

Intel or Motorola Mode Select

OUTPUTS

OUT[17:0]

Wideband Output Data

QOUT

When HIGH Indicates Q Output Data (Complex Output Mode)

JTAG AND BIST

TRST2

Test Reset Pin (Active Low)

TCK1

Test Clock Input

TMS

Test Mode Select Input

TDO

O/T

Test Data Output

TDI1

Test Data Input

NOTES

1Pins with a Pull-Down resistor of nominal 70 k

Ω.

2Pins with a Pull-Up resistors of nominal 70 k

Ω.

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