M24C08-125 datasheet(14/30 Pages) STMICROELECTRONICS

14 / 30 page

Device operation

M24C16-125 M24C08-125 M24C04-125 M24C02-125

14/30

Doc ID 022564 Rev 1

3.6.1

Byte Write

After the device select code and the address byte, the bus master sends one data byte. If

the addressed location is Write-protected, by Write Control (WC) being driven High, the

device replies to the data byte with NoAck, as shown in Figure 6, and the location is not

modified. If, instead, the addressed location is not Write-protected, the device replies with

Ack. The bus master terminates the transfer by generating a Stop condition, as shown in

Figure 7.

3.6.2

Page Write

The Page Write mode allows up to 16 bytes to be written in a single Write cycle, provided

that they are all located in the same page in the memory: that is, the most significant

memory address bits are the same. If more bytes are sent than will fit up to the end of the

page, a condition known as ‘roll-over’ occurs. This should be avoided, as data starts to

become overwritten in an implementation dependent way.

The bus master sends from 1 to 16 bytes of data, each of which is acknowledged by the

device if Write Control (WC) is Low. If the addressed location is Write-protected, by Write

Control (WC) being driven High, the device replies to the data bytes with NoAck, as shown

in Figure 6, and the locations are not modified. After each byte is transferred, the internal

byte address counter (the 4 least significant address bits only) is incremented. The transfer

is terminated by the bus master generating a Stop condition.

M24C08-125 Fiches technique(PDF) 14 Page - STMicroelectronics