CC2420Z-RTR1 datasheet(72/92 Pages) TI

72 / 92 page

CC2420

SWRS041B

Page 72 of 89

IOCFG0 (0x1C) – I/O Configuration Register 0

Bit

Field Name

Reset

R/W

Description

15:12

Reserved, write as 0

BCN_ACCEPT

R/W

Accept all beacon frames when address recognition is enabled.

This bit should be set when the PAN identifier programmed into

CC2420 RAM is equal to 0xFFFF and cleared otherwise. This bit

is don't care when MDMCTRL0.ADR_DECODE = 0.

0 : Only accept beacons with a source PAN identifier which

matches the PAN identifier programmed into CC2420 RAM

1 : Accept all beacons regardless of the source PAN identifier

FIFO_POLARITY

R/W

Polarity of the output signal FIFO.

0 : Polarity is active high

1 : Polarity is active low

FIFOP_POLARITY

R/W

Polarity of the output signal FIFOP.

0 : Polarity is active high

1 : Polarity is active low

SFD_POLARITY

R/W

Polarity of the SFD pin.

0 : Polarity is active high

1 : Polarity is active low

CCA_POLARITY

R/W

Polarity of the CCA pin.

0 : Polarity is active high

1 : Polarity is active low

6:0

FIFOP_THR[6:0]

R/W

FIFOP_THR sets the threshold in number of bytes in the

RXFIFO for FIFOP to go active.

IOCFG1 (0x1D) – I/O Configuration Register 1

Bit

Field Name

Reset

R/W

Description

15:13

Reserved, write as 0

12:10

HSSD_SRC[2:0]

R/W

The HSSD module is used as follows:

0: Off.

1: Output AGC status (gain setting / peak detector status /

accumulator value)

2: Output ADC I and Q values.

3: Output I/Q after digital down mix and channel filtering.

4: Reserved

5: Reserved

6: Input ADC I and Q values

7: Input DAC I and Q values.

The HSSD module requires that the FS is up and running as it

uses CLK_PRE (~150 MHZ) to produce its ~37.5 MHz data clock

and serialize its output words.

9:5

SFDMUX[4:0]

R/W

Multiplexer setting for the SFD pin.

4:0

CCAMUX[4:0]

R/W

Multiplexer setting for the CCA pin.

MANFIDL (0x1E) - Manufacturer ID, Lower 16 Bit

Bit

Field Name

Reset

R/W

Description

15:12

PARTNUM[3:0]

The device part number. CC2420 has part number 0x002.

11:0

MANFID[11:0]

0x33D

Gives the JEDEC manufacturer ID. The actual manufacturer ID

can be found in MANIFID[7:1], the number of continuation bytes

in MANFID[11:8] and MANFID[0]=1.

Chipcon's JEDEC manufacturer ID is 0x7F 0x7F 0x7F 0x9E

(0x1E preceded by three continuation bytes.)

CC2420Z-RTR1 Fiches technique(PDF) 72 Page - Texas Instruments

CC2420Z-RTR1 Fiches technique(HTML) 72 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Fiches technique Télécharger

Lien URL