SM5K3 datasheet(18/28 Pages) SHARP

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SM5K3/SM5K4/SM5K5

- 18 -

A/D CONVERSION MODE

In the A/D conversion mode, the converter converts

the analog input voltage to the digital value. The

analog input voltage is successively compared with

the internal voltage charged on the weighted

capacitor array until its digital equivalent is

determined. The resultant digital data is stored into

the mode registers R8 and R9.

The conversion requires 152.5 µs (main clock at

400 kHz/system clock at 5 µs) or 1.86 ms (main

clock at 32.768 kHz/system clock at 61 µs).

COMPARISON MODE

In the comparison mode, the analog voltage from

one of P30 to P33 pins is compared, in amplitude,

with internally generated voltage whose value is set

by the mode registers R8 and R9. The result data

of the comparison is saved into the bit 4 (bit R84)

position of the mode register R8. The comparison

cycle lasts 62.5 µs (main clock at 400 kHz, system

clock at 5 µs) or 763 µs (main clock at 32.768

kHz/system clock at 61 µs).

A/D Conversion

The SM5K3/5K4/5K5 are provided with a built-in

10-bit A/D converter having 4-channel multiplexer

analog inputs. The A/D converter operates in A/D

conversion mode and comparison mode. In the

A/D conversion mode, the converter converts the

analog input from the P3 pin to the digital value;

and in the comparison mode, it compares the input

analog amplitude with that of a reference voltage

set inside the SM5K3/5K4/5K5. The P30 to P33

pins can be used as analog voltage inputs. One or

more of these 4 inputs can be set to assume A/D

pin by the bit operation of the mode register R3.

One of these A/D pins is further set as analog input

by the bit operation of the mode register R8. The

A/D converter is controlled by the bits set in the

mode register R8. For details of the mode register

R8, refer to " MODE REGISTERS R8 ".

Configuration of the A/D converter is illustrated in

Fig. 11.

CAUTIONS

• Keep the A/D converter reference voltage on the VR pin

equal to or below VDD.

• Do not apply the voltage to the VR pin before VDD is

applied.

• Connect AGND to GND.

Fig. 11

A/D Converter Block Diagram

P30

P31

P32

P33

Changeover

R3 register

A register

X, A registers

A/D control, data

(mode register R8 )

A/D data

( Mode register R9 )

AGND

10-bit

D/A

Comparator

Control circuit

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