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PCF8591 Fiches technique(PDF) 14 Page - NXP Semiconductors |
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PCF8591 Fiches technique(HTML) 14 Page - NXP Semiconductors |
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14 / 28 page ![]() 2003 Jan 27 14 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 8.5 I2C-bus protocol After a start condition a valid hardware address has to be sent to a PCF8591 device. The read/write bit defines the direction of the following single or multiple byte data transfer. For the format and the timing of the start condition (S), the stop condition (P) and the acknowledge bit (A) refer to the I2C-bus characteristics. In the write mode a data transfer is terminated by sending either a stop condition or the start condition of the next data transfer. handbook, full pagewidth 0 MBL833 S ADDRESS CONTROL BYTE DATA BYTE acknowledge from PCF8591 A acknowledge from PCF8591 A A P/S acknowledge from PCF8591 N = 0 to M data bytes Fig.16 Bus protocol for write mode, D/A conversion. handbook, full pagewidth 1 MBL834 S ADDRESS DATA BYTE LAST DATA BYTE acknowledge from PCF8591 A acknowledge from master A 1 P no acknowledge N = 0 to M data bytes Fig.17 Bus protocol for read mode, A/D conversion. |
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