SIZE

CODE IDENT NO.

UNSPECIFIED TOLERANCES

DWG NO.

REV.

SHEET

A

00136

N/A

DOC200103

C

3

3.2

Item Identification. External packaging choices are either metal flatpacks or DDIP with either

Sinewave or CMOS logic output. Unique Model Number Series’ are utilized to identify device

package configurations and output waveform as listed in Table 1.

3.3

Absolute Maximum Ratings.

-0.5Vdc to +7.0Vdc (CMOS)

-65°C to +125°C

+175°C

d. Lead Temperature (soldering, 10 seconds):

+300°C

e. Output Source/Sink Current

±50 mA

3.4

Design, Parts, Materials and Processes, Assembly, Inspection and Test.

3.4.1

Design. The ruggedized designs implemented for these devices are proven in military and

space applications under extreme environments. All designs utilize a 4-point crystal mount.

When Class S is specified, a radiation tolerance of 100krad (Si) (RHA level R) is included

without altering the device’s internal topography. For all Class S and Class B products,

components meet the Element Evaluation requirements of MIL-PRF-55310, Appendix B. If

Design Pedigree Code “E” is chosen, Enhanced Element Evaluation per Appendix A will be

performed.

3.4.1.1 Design and Configuration Stability. Barring changes to improve performance by reselecting

passive chip component values to offset component tolerances, there will not be fundamental

changes to the design or assembly or parts, materials and processes after first product delivery

of that item without written approval from the procuring activity.

3.4.1.2 Environmental Integrity. Designs have passed the environmental qualification levels of MIL-

PRF-55310. These designs have also passed extended dynamic levels of at least:

Sine Vibration: MIL-STD-202, Method 204, Condition G (30g pk.)

Random Vibration: MIL-STD-202, Method 214, Condition II-J (43.92g rms)

Mechanical Shock: MIL-STD-202, Method 213, Condition F (1500g, 0.5ms)

3.4.2

Prohibited Parts, Materials and Processes. The items listed are prohibited for use in high

reliability devices produced to this specification.

a. Gold metallization of package elements without a barrier metal.

b. Zinc chromate as a finish.

c. Cadmium, zinc, or pure tin external or internal to the device.

d. Plastic encapsulated semiconductor devices.

e. Ultrasonically cleaned electronic parts.

f. Heterojunction Bipolar Transistor (HBT) technology.

3.4.3

Assembly. Manufacturing utilizes standardized procedures, processes and verification

methods to produce MIL-PRF-55310 Class S / MIL-PRF-38534 Class K equivalent devices.

MIL-PRF-38534 Group B Option 1 in-line inspection is included on radiation hardened part

numbers to further verify lot pedigree. Traceability of all components and production lots are