CMX625P4 datasheet(13/34 Pages) CMLMICRO

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ISDN TA POTS Interface

CMX625

 2001 Consumer Microcircuits Limited

D/625/2

Byte 1

Byte 2

Abort Request

EOM

Data

Figure 8 Abort Request from the Receiver

1.5.5

Monitor Channel Identification Command

In order to be able to identify different devices on the IOM-2 bus, an identification command is sent. This

allows the software to identify different manufacturer's devices on the bus. The identification sequence is

usually done once, when the device is connected for the first time.

A device requesting the identity of a connected CMX625 will transmit the following 2 byte command:

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit 0

DD 1

st byte

SA2

SA1

SA0

DD 2

nd byte

The CMX625 responds by transmitting:

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit 0

DU 1

st byte

SA2

SA1

SA0

Monitor Channel Address Byte

DU 2

nd byte

Device Identification Byte

SA(2-0) = Slot Address, DS = Device Select (see sections 1.5.2 and 1.5.3). See section 1.5.14 for the

Device Identification Register.

1.5.6

PCM Codec-Filter

The PCM Codec-Filter performs voice digitisation and reconstruction and incorporates encoder bandpass

and decoder lowpass filters with pre and post-filtering with selectable A-law and µ-law companding. In

each case the coder and decoder process a companded 8-bit PCM word following ITU-T recommendation

G.711 for A-law and µ-law conversion. The encoder bandpass filter and decoder lowpass filter provide

passband flatness and stopband rejection according to ITU-T recommendation G.712. The lowpass filter

contains the required (Sin X)/X compensation. The overall filter characteristics of the channel are shown

in Figure 12.

The PCM Codec-Filter block is enabled or disabled by bit 7 of the CODEC CONTROL Register. The

companding law is selected by bit 6. When this bit is a ‘0’, A-law companding is selected (used in Europe)

and when this bit is a ‘1’, µ-law is selected (used in the USA and Japan).

The PCM Codec Channel routeing is shown in the table below for normal operation and bus reversal. In

‘normal’ operation, bit 4 of the IOM Control Register is set to ‘0’, the data is transmitted on the Data

Upstream (DU) pin and received on the Data Downstream (DD) pin. Bits 6 and 7 of the IOM Control

2 bus. The B1 and B2 channels are available in TE and non-TE mode but the IC1 and IC2 channels are

only available in TE mode.

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