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ST10F276Z5 Fiches technique(PDF) 227 Page - STMicroelectronics

No de pièce ST10F276Z5
Description  16-bit MCU with MAC unit, 832 Kbyte Flash memory and 68 Kbyte RAM
PDF  239 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10F276Z5 Fiches technique(HTML) 227 Page - STMicroelectronics

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Electrical characteristics
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Figure 69.
SSC slave timing
1.
The phase and polarity of shift and latch edge of SCLK is programmable. This figure uses the leading clock
edge as shift edge (drawn in bold), with latch on trailing edge (SSCPH = 0b), idle clock line is low, leading
clock edge is low-to-high transition (SSCPO = 0b).
2.
The bit timing is repeated for all bits to be transmitted or received.
1st out bit
Last out bit
2nd out bit
1)
2)
2nd in bit
1st in bit
Last in bit
SCLK
MRST
MTSR
t
315
t
315
t
315
t
316
t
318
t
317
t
317
t
318
t
310
t
311
t
312
t
313
t
314
(2)
(1)



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