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PIC18F44J50 Fiches technique(PDF) 8 Page - Microchip Technology |
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PIC18F44J50 Fiches technique(HTML) 8 Page - Microchip Technology |
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8 / 12 page ![]() PIC18F46J50 FAMILY DS80436C-page 8 2010 Microchip Technology Inc. Data Sheet Clarifications The following typographic corrections and clarifications are to be noted for the latest version of the Device Data Sheet (DS39931C): 1. Module: Special Features (CONFIG2L) The “T1DIG” feature mentioned in the Device Data Sheet (DS39931C) is not implemented in this device family. The feature, associated with bit 3 of the CONFIG2L Configuration register, is discussed in Section 26.1 “Configuration Bits” and Section 2.5.1 “Oscillator Control Register”. For application firmware to switch to the Timer1 clock source, it must first enable the crystal driver by setting the T1OSCEN bit (T1CON<3>). The microcontroller will ignore attempts to clock switch to the Timer1 clock source when the crystal driver is disabled. 2. Module: DC Characteristics (Power-Down Current) Section 29.2 “DC Characteristics: Power- Down and Supply Current” lists the maximum Power-Down (IPD) Sleep mode current for PIC18FXXJ50 devices, operating at VDD = 2.15V and -40°C, and 25°C at 5 A. The correct maximum is 6 A. 3. Module: DC Characteristics (Input Leakage) In Table 29-7 USB Module Specifications, electrical parameter D314 indicates the D+ and D- pin leakage is +/-0.2 A maximum. The updated specification is +/-0.5 A maximum, over the -40°C to +85°C temperature range. The input leakage specification for all other I/O pins remains unchanged at the +/-0.2 A maxi- mum level, as indicated by electrical parameters D060, D061 and D063 (IIL), in Section 29.3 “DC Characteristics”. Note: Corrections are shown in bold. Where possible, the original bold text formatting has been removed for clarity. |
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