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PCF8563 Fiches technique(PDF) 15 Page - NXP Semiconductors

No de pièce PCF8563
Description  Real-time clock/calendar
PDF  32 Pages
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF8563 Fiches technique(HTML) 15 Page - NXP Semiconductors

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PCF8563_6
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 21 February 2008
15 of 32
NXP Semiconductors
PCF8563
Real-time clock/calendar
8.5 I2C-bus protocol
8.5.1 Addressing
Before any data is transmitted on the I2C-bus, the device which should respond is
addressed first. The addressing is always carried out with the first byte transmitted after
the start procedure.
The PCF8563 acts as a slave receiver or slave transmitter. Therefore the clock signal SCL
is only an input signal, but the data signal SDA is a bidirectional line.
The PCF8563 slave address is shown in Figure 13.
8.5.2 Clock/calendar read/write cycles
The I2C-bus configuration for the different PCF8563 read and write cycles is shown in
Figure 14, Figure 15 and Figure 16. The word address is a 4-bit value that defines which
register is to be accessed next. The upper four bits of the word address are not used.
Fig 12. Acknowledgement on the I2C-bus
mbc602
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
data output
by transmitter
data output
by receiver
SCL from
master
Fig 13. Slave address
mce189
1
0
1
0
0
0
1
R/W
group 1
group 2



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