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CS4294/CS4298 Fiches technique(PDF) 61 Page - Cirrus Logic |
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CS4294/CS4298 Fiches technique(HTML) 61 Page - Cirrus Logic |
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61 / 81 page ![]() CS4205 DS489PP4 61 PR Bit ADCs DACs Mixer Analog Reference AC Link Internal Clock Off Mic ADC PR0 • PR1 • PR2 ••• • PR3 ••• • • PR4 • PR5 •• • • PRL • Table 25. Powerdown PR Function Matrix for the CS4205 Power State IDVdd1 (mA) [DVdd=3.3 V] IDVdd1 (mA) [DVdd=5 V] IAVdd1 (mA) Full Power + SRC’s TBD TBD TBD Full Power + S/PDIF1 TBD TBD TBD Full Power TBD TBD TBD ADCs off (PR0) TBD TBD TBD DACs off (PR1) TBD TBD TBD Audio off (PR2) TBD TBD TBD Vref off (PR3) TBD TBD TBD AC-Link off (PR4) TBD TBD TBD Internal Clocks off (PR5) TBD TBD TBD Digital off (PR4+PR5) TBD TBD TBD All off (PR3+PR4+PR5) TBD TBD TBD RESET TBD TBD TBD Table 26. Power Consumption by Powerdown Mode for the CS4205 1 Assuming standard resistive load for transformer coupled coaxial S/PDIF output (Rload = 292 Ohm, DVdd = 3.3 V) (Rload = 415 Ohm, DVdd = 5 V). General: IDVdd S/PDIF = IDVdd + DVdd/Rload/2 |
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