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74LVC74AD Fiches technique(PDF) 8 Page - NXP Semiconductors

No de pièce 74LVC74AD
Description  Dual D-type flip-flop with set and reset; positive-edge trigger
PDF  16 Pages
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

74LVC74AD Fiches technique(HTML) 8 Page - NXP Semiconductors

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74LVC74A_6
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 06 — 4 June 2007
8 of 16
NXP Semiconductors
74LVC74A
Dual D-type flip-flop with set and reset; positive-edge trigger
VM = 1.5 V at VCC ≥ 2.7 V;
VM = 0.5 × VCC at VCC < 2.7 V;
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8.
The set (nSD) and reset (nRD) input to output (nQ, nQ) propagation delays, the set and reset pulse widths,
and the nRD to nCP recovery time
mna423
trec
tPHL
tPHL
tW
tPLH
tPLH
VM
VM
VM
tW
VM
VM
VI
GND
VI
GND
nSD input
VI
GND
nRD input
nCP input
VOH
VOL
nQ output
VOH
VOL
nQ output



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