SS8017 datasheet(14/16 Pages) SSC

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SS8017

Rev.2.01 6/06/2003

Table 9. RLTS and RRTE Temp Register Update Timing Chart

OPERATING

MODE

CONVERSION

INITIATED BY:

NEW CONVERSION RATE

(CHANGED VIA WRITE TO CRW)

TIME UNTIL RLTS AND

RRTEARE UPDATED

Auto-Convert

Power-on reset

N/A (0.25Hz)

156ms max

Auto-Convert

1-shot command, while idling be-

tween automatic conversions

N/A

156ms max

Auto-Convert

1-shot command that occurs dur-

ing a conversion

N/A

When current conversion is

complete (1-shot is ignored)

Auto-Convert

Rate timer

0.0625Hz

20sec

Auto-Convert

Rate timer

0.125Hz

10sec

Auto-Convert

Rate timer

0.25Hz

5sec

Auto-Convert

Rate timer

0.5Hz

2.5sec

Auto-Convert

Rate timer

1Hz

1.25sec

Auto-Convert

Rate timer

2Hz

625ms

Auto-Convert

Rate timer

4Hz

312.5ms

Auto-Convert

Rate timer

8Hz

237.5ms

Software Standby RUN/STOP bit

N/A

156ms

Software Standby 1-shot command

N/A

156ms

To check for internal bus collisions, read the status

byte. If the least significant seven bits are ones, dis-

card the data and read the status byte again. The

status bits LHIGH, LLOW, RHIGH, and RLOW are re-

freshed on the SMBus clock edge immediately follow-

ing the stop condition, so there is no danger of losing

temperature-related status data as a result of an inter-

nal bus collision. The OPEN status bit (diode continu-

ity fault) is only refreshed at the beginning of a conver-

sion, so OPEN data is lost. The ALERT interrupt latch

is independent of the status byte register, so no false

alerts are generated by an internal bus collision.

When auto-converting, if the THIGH and TLOW limits

are close together, it's possible for both high-temp and

low-temp status bits to be set, depending on the

amount of time between status read operations (espe-

cially when converting at the fastest rate). In these cir-

cumstances, it's best not to rely on the status bits to

indicate reversals in long-term temperature changes

and instead use a current temperature reading to es-

tablish the trend direction.

Temperature Conversion Rate Byte

The conversion rate register (Table 7) programs the

time interval between conversions in free running

auto-convert mode. This variable rate control reduces

the supply current in portable-equipment applications.

The conversion rate byte's POR state is 02h (0.25Hz).

The SS8017 looks only at the 3 LSB bits of this regis-

ter, so the upper 5 bits are "don't care" bits, which

should be set to zero. The conversion rate tolerance is

±25% at any rate setting.

Valid A/D conversion results for all channels are avail-

able one total conversion time (125ms nominal, 156ms

maximum) after initiating a conversion, whether con-

version is initiated via the RUN/STOP bit, one-shot

command, or initial power-up. Changing the conversion

rate can also affect the delay until new results are

available. See Table 8.

Slave Addresses

The SS8017 appears to the SMBus as one device hav-

ing a common address for all the ADC and fan control

channels. The device address is fixed to be 7Ah for

write and 7Bh for read.

The SS8017 also responds to the SMBus Alert Re-

sponse slave address (see the Alert Response Ad-

dress section).

POR and UVLO

The SS8017 has a volatile memory. To prevent am-

biguous power-supply conditions from corrupting the

data in memory and causing erratic behavior, a POR

voltage detector monitors Vcc and clears the memory

if Vcc falls below 1.7V (typical, see Electrical Charac-

teristics table). When power is first applied and Vcc

rises above 1.75V (typical), the logic blocks begin

operating, although reads and writes at VCC levels

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