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MAXQ3181-RAN+ Fiches technique(PDF) 10 Page - Maxim Integrated Products |
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MAXQ3181-RAN+ Fiches technique(HTML) 10 Page - Maxim Integrated Products |
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10 / 84 page ![]() Low-Power, Active Energy, Polyphase AFE 10 ______________________________________________________________________________________ ELECTRICAL CHARACTERISTICS (continued) (VAVDD = VDVDD = VRST to 3.6V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SSEL Low to First SCLK Edge (Slave Enable) tSE (Note 3) 4/tSYS ns Last SCLK Edge to SSEL High (Slave Disable) tSD tSYS + 5 ns MOSI Valid to SCLK Sample Edge (MOSI Setup) tSIS 5 ns SCLK Sample Edge to MOSI Change (MOSI Hold) tSIH tSYS + 5 ns SCLK Shift Edge to MISO Valid (MISO Hold) tSOV 3tSYS + 5 ns Note 1: Specifications guaranteed by design but not production tested. Note 2: Specifications to -40°C are guaranteed by design and are not production tested. Note 3: tSYS = 1/fSYS, where fSYS is the system clock frequency, external or internal. SPI Slave Mode Timing SSEL SHIFT EDGE SAMPLE EDGE SCLK DATA OUTPUT DATA INPUT tSD tSE tSOV tSIH tSIS tSCL tSCH |
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