AT90SCR100 datasheet(45/433 Pages) ATMEL

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TPR0327AY–SMS–30Jan09

AT90SCR100

8.2

Power Reduction Register

The Power Reduction Register, PRR, provides a method to stop the clock to individual peripher-

als to reduce power consumption. The current state of the peripheral is frozen and the I/O

registers can not be read or written. Resources used by the peripheral when stopping the clock

will remain occupied, hence the peripheral should in most cases be disabled before stopping the

clock. Waking up a module, which is done by clearing the bit in PRR, puts the module in the

same state as before shutdown.

8.2.1

SMCR – Sleep Mode Control Register

The Sleep Mode Control Register contains control bits for power management.

• Bits 3..1 – SM2..0 : Sleep Mode Select Bits 2..0

These bits select between the five available sleep modes as shown in Table 8-2.

Note:

1. Standby modes are only recommended for use with external crystals or resonators.

• Bit 0 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP

instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s

purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of

the SLEEP instruction and to clear it immediately after waking up.

8.2.2

PRR0 – Power Reduction Register 0

The Power Reduction Register allows the shut down of peripherals directly connected to CPU

resources. These peripherals are activated by default and can be shut down for power con-

sumption reasons if they are not used by an application.

Bit

7654

0x33 (0x53)

----

SM2

SM1

SM0

SMCR

Read/write

RRRR

R/W

Initial value

0000

0x00

Table 8-2.

Sleep Mode Select

SM2

SM1

SM0

Sleep Mode

Idle

Reserved

Power-down

Power-save

Reserved

Standby(1)

Extended Standby(1)

Bit

76543

$000064

PRTWI

PRTIM2

PRTIM0

PRTIM1

PRSPI

PRUSART0

PRR0

Read/write

R/W

Initial value

00000

0x00

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