AT90SCR100 datasheet(214/433 Pages) ATMEL

214 / 433 page

214

TPR0327AY–SMS–30Jan09

AT90SCR100

Figure 17-7.

Example of OUT Data bank Management

17.5.12.2

“Autoswitch” mode

In this mode, the clear of the UPINTX.FIFOCON bit is performed automatically by hardware

each time the Pipe bank is full. The firmware has to check if the next bank is empty or not before

writing the next data. On UPINTX.TXOUTI interrupt, the firmware fills a complete bank. A new

interrupt will be generated each time the current bank becomes free.

OUT

ACK

DATA

(Bank 0)

UPINTX.TXOUTI

UPINTX.FIFOCON

OUT

Write data from CPU

Bank 0

Write data from CPU

Bank 0

OUT

ACK

DATA

(Bank 0)

DATA

(Bank 1)

UPINTX.TXOUTI

UPINTX.FIFOCON

Write data from CPU

Bank 0

Write data from CPU

Bank 1

Write data from CPU

Bank 0

Example with 1 OUT data bank

Example with 2 OUT data banks

OUT

ACK

DATA

(Bank 0)

DATA

(Bank 1)

UPINTX.TXOUTI

UPINTX.FIFOCON

Write data from CPU

Bank 0

Write data from CPU

Bank 1

Write data from CPU

Bank 0

Example with 2 OUT data banks

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