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TLE8201R Fiches technique(PDF) 21 Page - Infineon Technologies AG |
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TLE8201R Fiches technique(HTML) 21 Page - Infineon Technologies AG |
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21 / 45 page ![]() TLE 8201R Data Sheet Rev. 2.0 21 2006-06-07 4.3.4.1 Error-Flag In addition to the 16 bits transferred from the TLE 7201R to the SPI master, an additional Error Flag (EF) is transmitted at the DO pin. The EF status is shown on the DO pin after CSN H->L, before the first rising edge at CLK, as shown in Figure 6. The Error flag is set to H if any of the Status Registers contains an error message (i.e. EF = EF_00 or EF_01 or EF_10 or EF_11) . Figure 6 Error Flag transmission on DO during standard SPI transmission (top), or without additional SPI transmission, CLK low (bottom) 4.3.5 Electrical Characteristics Electrical Characteristics - SPI-timing 8 V < V S < 20 V; 4.75 V < VCC < 5.25 V; INH = High; all outputs open; -40 °C < T j < 150 °C; unless otherwise specified Pos. Parameter Sym- bol Limit Values Unit Conditions min. typ. max. 4.3.1 CSN lead time t lead 100 – – ns 11) 4.3.2 CSN lag time t lag 100 – – ns 21) 4.3.3 Fall time for CSN, CLK, DI, DO t f –– 25 ns 31) 4.3.4 Rise time for CSN, CLK, DI, DO t r –– 25 ns 41) DO Z EF bit15 bit14 bit13 bit12 CLK CSN DO ZEF Z CLK CSN |
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