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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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UM0470 Fiches technique(PDF) 13 Page - STMicroelectronics |
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UM0470 Fiches technique(HTML) 13 Page - STMicroelectronics |
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13 / 37 page  UM0470 Single wire interface module (SWIM) 13/37 3.8 SWIM communication in Halt mode To maintain the communication link with the debug host, the HSI oscillator remains on when the MCU enters Halt mode. This means that halt mode power consumption measurements have no meaning when the SWIM module is active. The NO_ACCESS bit in the SWIM_CSR register is set when the system is in HALT, WFI or readout protection mode. This means the bus is not accessible in this case. The OSCOFF bit in the SWIM_CSR register is used to switch off the oscillator. In this case, debug control is lost as long as the device is in Halt mode and the SWIM pin is high. The only way to recover the debug control is to induce a falling edge on SWIM pin: this will re- enable the HSI oscillator. |
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