AT52SC1283J datasheet(9/52 Pages) ATMEL

9 / 52 page

3530B–STKD–2/4/05

AT52SC1283J/1284J [Preliminary]

Figure 6-2.

Sector Locking State Diagram

Note:

1. The notation [X, Y, Z] denotes the locking state of a sector. The current locking state of a sector

is defined by the state of WP and the two bits of the sector-lock status D[1:0].

6.12.3

Sector Protection Detection

A software method is available to determine if the sector protection Softlock or Hardlock features

are enabled. When the device is in the software product identification mode a read from the I/O0

and I/O1 at address location 00002H within a sector will show if the sector is unlocked, soft-

locked, or hardlocked.

6.13

Read Status Register

The status register indicates the status of device operations and the success/failure of that oper-

ation. The Read Status Register command causes subsequent reads to output data from the

status register until another command is issued. To return to reading from the memory, issue a

Read command.

The status register bits are output on I/O7 - I/O0. The upper byte, I/O15 - I/O8, outputs 00H

when a Read Status Register command is issued.

The contents of the status register [SR7:SR0] are latched on the falling edge of OE or CE

(whichever occurs last), which prevents possible bus errors that might occur if status register

[000]

[001]

[011]

[111]

[101]

[110]

[100]

UNLOCKED

LOCKED

WP = V

IL =0

WP = V

IH =1

Power-Up/Reset

Default

Power-Up/Reset

Default

Hardlocked is disabled by

WP = V

= Unlock Command

= Softlock Command

= Hardlock Command

Hardlocked

Table 6-2.

Sector Protection Status

I/O1

I/O0

Sector Protection Status

Sector Not Locked

Softlock Enabled

Hardlock Enabled

Both Hardlock and Softlock Enabled

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