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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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AT89C5122DS-RDRUM Fiches technique(PDF) 99 Page - ATMEL Corporation |
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AT89C5122DS-RDRUM Fiches technique(HTML) 99 Page - ATMEL Corporation |
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99 / 208 page  99 AT83R5122, AT8xC5122/23 4202F–SCR–07/2008 • Endpoint FIFO reset Before using an endpoint, its FIFO should be reset. This action resets the FIFO pointer to its original value, resets the byte counter of the endpoint (UBYCTX register), and resets the data toggle bit (DTGL bit in UEPCONX). The reset of an endpoint FIFO is performed by setting to 1 and resetting to 0 the corre- sponding bit in the UEPRST register. For example, in order to reset the Endpoint number 2 FIFO, write 0000 0100b then 0000 0000b in the UEPRST register. |
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