PCA2002CX8SLASH5SLASH1 datasheet(9/25 Pages) NXP

9 / 25 page

PCA2002_5

Product data sheet

Rev. 05 — 11 November 2008

9 of 25

NXP Semiconductors

PCA2002

32 kHz watch circuit programmable output period and pulse width

7.8 Checking the memory content

The stored data of the OTP array can be checked bit wise by measuring the supply

current (see Figure 6). The array word is selected by the instruction state and the bit is

addressed by the shift register.

To read a word, the word is ﬁrst selected (td =t1) and a logic 1 is written into the ﬁrst cell of

the shift register (td =t3). This logic 1 is then shifted through the entire shift register

(td =t2), so that it points with each clock pulse to the next bit.

If the addressed OTP cell contains a logic 1, a 30 k

Ω resistor is connected between V

and VSS; this increases the supply current accordingly.

Figure 6 shows the supply voltage modulation for reading word B, with the corresponding

supply current variation for word B = 110101 (sequence: ﬁrst MSB and last LSB).

VDD(nom): nominal supply voltage.

(1)

Fig 6.

Supply voltage modulation for reading word B

VDD(nom)

VDD

VP(mod)

(1)

VSS

mgw357

IDD

t1 t1

VP(prog)(start)

tp(start)

VP(prog)(stop)

tp(stop)

∆I

30 k

Ω

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