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TMDS361 Fiches technique(PDF) 13 Page - Texas Instruments

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No de pièce TMDS361
Description  1080p - Deep Color 3-to-1 HDMI/DVI Switch with Adaptive Equalization
PDF  42 Pages
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Fabricant  TI [Texas Instruments]
Site Internet  http://www.ti.com
Logo TI - Texas Instruments

TMDS361 Fiches technique(HTML) 13 Page - Texas Instruments

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SWITCHING CHARACTERISTICS
PULSE
GENRATOR
R
T
V
IN
D.U.T.
V
OUT
C =100pF
L
R =2k
L
W
5V
V
CC
S0369-01
PULSE
GENRATOR
R
T
V
IN
D.U.T.
V
OUT
C =400pF
L
R =2k
L
W
5V
V
CC
S0370-01
TMDS361
www.ti.com............................................................................................................................................................................................ SLLS919 – DECEMBER 2008
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tPLH1
Propagation delay time, low to high
Source to sink
80
251
ns
tPHL1
Propagation delay time, high to low
Source to sink
35
200
ns
tPLH2
Propagation delay time, low to high
Sink to source
204
459
ns
tPHL2
Propagation delay time, high to low
Sink to source
35
200
ns
tf1
Output signal fall time
Sink side
20
72
ns
tf2
Output-signal fall time
Source side
20
72
ns
fSCL
SCL clock frequency for internal register
Local I2C
100
kHz
tW(L)
Clock LOW period for I2C register
Local I2C
4.7
µs
tW(H)
Clock HIGH period for internal register
Local I2C
4
µs
tSU1
Internal register setup time, SDA to SCL
Local I2C
250
ns
th(1)
*1
Internal register hold time, SCL to SDA
Local I2C
0
µs
t(buf)
Internal register bus free time between STOP and START
Local I2C
4.7
µs
tsu(2)
Internal register setup time, SCL to START
Local I2C
4.7
µs
th(2)
Internal register hold time, START to SCL
Local I2C
4
µs
tsu(3)
Internal register hold time, SCL to STOP
Local I2C
4
µs
Figure 4. Sink-Side Test Circuit
Figure 5. Source-Side Test Circuit
Copyright © 2008, Texas Instruments Incorporated
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Product Folder Link(s) :TMDS361



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