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TMDS361 Fiches technique(PDF) 9 Page - Texas Instruments |
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TMDS361 Fiches technique(HTML) 9 Page - Texas Instruments |
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9 / 42 page ![]() DISSIPATION RATINGS THERMAL CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS TMDS361 www.ti.com............................................................................................................................................................................................ SLLS919 – DECEMBER 2008 DERATING FACTOR(1) TA = 70°C PACKAGE PCB JEDEC STANDARD TA ≤ 25°C ABOVE TA = 25°C POWER RATING Low-K 1066 mW 10.66 mW/°C 586 mW 64-pin TQFP (PAG) High-K 1481 mW 14.8 mW/°C 814 mW (1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX(1) UNIT RθJB Junction-to-board thermal resistance 37.13 °C/W RθJC Junction-to-case thermal resistance 15.3 °C/W Device power dissipation in normal mode LP = HIGH TMDS: VID(pp) = 1200 mV, 3 Gbps 560 PD(1) TMDS data pattern; HPD_SINK = HIGH, S1/S2 = 780 mW LOW/LOW, LOW/HIGH, HIGH/HIGH Device power dissipation in standby LP = HIGH, TMDS: VID(pp) = 1200 mV, 3 Gbps 10 PD(2) mode TMDS data pattern; HPD_SINK = HIGH, S1 = 20 mW HIGH, S2 = LOW Device power dissipation in low-power 1 PSD LP = LOW 2 mW mode Device power dissipation in normal mode LP = HIGH, No TMDS input clock, HPD_SINK 40 PNCLK with no active TMDS input clock =HIGH, S1/S2 = LOW/LOW, LOW/HIGH, 65 mW HIGH/HIGH (1) The maximum rating is simulated under 3.6V VCC across worse case temperature and process variation, Typical conditions are simulated at 3.3V VCC, 25 °C with nominal process material. MIN NOM MAX UNIT VCC Supply voltage 3 3.3 3.6 V TA Operating free-air temperature 0 70 °C TMDS DIFFERENTIAL OUTPUT PINS VID(pp) Peak-to-peak input differential voltage 0.15 1.56 V VIC Input common-mode voltage VCC – 0.4 VCC + 0.01 V AVCC TMDS output termination voltage 3 3.3 3.6 V dR Data rate 3 Gbps RVSadj Resistor for TMDS-compliant voltage output swing 3.66 4.02 4.47 k Ω RT Termination resistance 45 50 55 Ω DDC PINS VI Input voltage 0 5.5 V dR(I2C) I2C data rate 100 Kbps HPD AND CONTROL PINS VIH High-level input voltage 2 5.5 V VIL Low-level input voltage 0 0.8 V Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s) :TMDS361 |
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