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STA335BWS Fiches technique(PDF) 36 Page - STMicroelectronics |
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STA335BWS Fiches technique(HTML) 36 Page - STMicroelectronics |
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36 / 68 page ![]() Register description STA335BWS 36/68 Note: To the left of the arrow is the processing channel. When using channel output mapping, any of the three processing channel outputs can be used for any of the three inputs. 10 2 channel (full-bridge) power, 1 channel DDX: 1A/1B → 1A/1B 2A/2B → 2A/2B 3A/3B → 3A/3B EAPDEXT and TWARNEXT Active 0 11 1 channel mono-parallel: 3A → 1A/1B, w/ C3BO 45° 3B → 2A/2B, w/ C3BO 45° 1A/1B → 3A/3B 2A/2B → 4A/4B 1 Table 16. Output configuration engine selection (continued) OCFG[1:0] Output configuration Config pin Figure 9. OCFG = 00 (default value) Figure 10. OCFG = 01 Half Bridge Half Bridge Half Bridge Half Bridge OUT1A OUT1B OUT2A OUT2B Channel 2 Channel 1 LPF LineOut 1 OUT3B LPF LineOut 2 OUT4B OUT4A OUT3A Half Bridge Half Bridge Half Bridge Half Bridge OUT1A OUT1B OUT2A OUT2B Channel 3 Channel 1 Channel 2 |
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