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M48T35_0708 Fiches technique(PDF) 10 Page - STMicroelectronics |
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M48T35_0708 Fiches technique(HTML) 10 Page - STMicroelectronics |
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10 / 29 page ![]() Operation modes M48T35 M48T35Y 10/29 WRITE Cycles to avoid bus contention; although, if the output bus has been activated by a low on E and G, a low on W will disable the outputs tWLQZ after W falls. Figure 6. Write enable controlled, write AC waveform Figure 7. Chip enable controlled, write AC waveforms AI00926 tAVAV tWHAX tDVWH DATA INPUT A0-A14 E W DQ0-DQ7 VALID tAVWH tAVEL tWLWH tAVWL tWLQZ tWHDX tWHQX AI00927 tAVAV tEHAX tDVEH A0-A14 E W DQ0-DQ7 VALID tAVEH tAVEL tAVWL tELEH tEHDX DATA INPUT Table 4. Write mode AC characteristics Symbol Parameter(1) M48T35/Y Unit Min Max tAVAV WRITE Cycle Time 70 ns tAVWL Address Valid to WRITE Enable Low 0 ns tAVEL Address Valid to Chip Enable Low 0 ns |
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