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LNBP13 Fiches technique(PDF) 5 Page - STMicroelectronics |
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LNBP13 Fiches technique(HTML) 5 Page - STMicroelectronics |
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5 / 24 page ![]() LNBP20 / LNBP1X series Pin configuration 5/24 Note: The limited pin availability of the PowerSO-10 package leads to drop some functions. ENT 22KHz tone enable Logic control input: see truth table 13 777 7777 CEXT External capacitor Timing capacitor used by the dynamic overload protection. Typical application is 4.7 μF for a 1200ms cycle 14 888 8888 EXTM External modulator External modulation input. Needs DC decoupling to the AC source. if not used, can be left open. 15 NA NA NA 9 NA 9 9 LLC Line length compens. (1V typ) Logic control input: see truth table 16 NA NA 9 NA 9 NA 10 OLF Over load flag Logic output (open collector). Normally in HIGH IMPEDANCE, goes LOW when current or thermal overload occurs 17 NA 9 NA NA 10 10 NA MI Master input In stand-by mode, the voltage on MI is routed to LNBA pin. Can be left open if bypass function is not needed 18 NA 10 10 10 NA NA NA LNBB Output port See truth tables for voltage and port selection 19 10 NA NA NA NA NA NA Table 1. Pin Description SYMBOL NAME FUNCTION PIN NUMBER vs SALES TYPE (LNBP) 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP |
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