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56F827 Fiches technique(PDF) 9 Page - Freescale Semiconductor, Inc |
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56F827 Fiches technique(HTML) 9 Page - Freescale Semiconductor, Inc |
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9 / 60 page ![]() Introduction 56F827 Technical Data, Rev. 12 Freescale Semiconductor 9 Figure 2-1 56F827 Signals Identified by Functional Group1 1. Alternate pin functionality is shown in parenthesis. 56F827 2.5V Power 3.3V Analog Power 3.3V Analog Power 3.3V Power Ground Analog Ground Analog Ground Ground PLL and Clock External Address Bus or GPIO External Data Bus or GPIO External Bus Control Dedicated GPIO SPI1 Port or GPIO SCI0,SCI1 Port or SPI0 Port VDD VDDA VDDA_ADC VDDIO VSS VSSA VSSA_ADC VSSIO VPP EXTAL XTAL(CLOCKIN) CLKO A0-A15(GPIOA0–15) D0–D15(GPIOG0-15) PS (PCS0) DS (PCS1) RD WR TA0 (GPIOF0) TA1 (GPIOF1) TA2 (GPIOF2) TA3 (GPIOF3) TCK TMS TDI TDO TRST DE Quad Timer A or GPIO JTAG/OnCE ™ Port GPIOB0–7 GPIOD0–7 SRD (GPIOC0) SRFS (GPIOC1) SRCK (GPIOC2) STD (GPIOC3) STFS (GPIOC4) STCK (GPIOC5) SCLK (GPIOF4) MOSI (GPIOF5) MISO (GPIOF6) SS (GPIOF7) TXD0 (SCLK0) RXD0 (MOSI0) TXD1 (MISO0) RXD1 (SS0) TXD2 (GPIOC6) RXD2 (GPIOC7) PCS2-7 ANA0–9 VREFN VREFP VREFMID VREFLO VREFHI IRQA IRQB RESET EXTBOOT SSI Port or GPIO ADC Port SCI2 Port or GPIO Other Supply Port 3 1 1 5 4* 1 1 5 1 1 1 1 16 16 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Interrupt/ Program Control 8 8 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 6 10 1 1 1 1 1 1 1 1 1 Programmable Chip Select *Includes TCS pin, which is reserved for factory use and is tied to VSS |
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