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ST62T00C6 Fiches technique(PDF) 54 Page - STMicroelectronics |
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ST62T00C6 Fiches technique(HTML) 54 Page - STMicroelectronics |
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54 / 100 page ![]() ST6200C/ST6201C/ST6203C 54/100 INSTRUCTION SET (Cont’d) Arithmetic and Logic. These instructions are used to perform arithmetic calculations and logic operations. In AND, ADD, CP, SUB instructions one operand is always the accumulator while, de- pending on the addressing mode, the other can be either a data space memory location or an imme- diate value. In CLR, DEC, INC instructions the op- erand can be any of the 256 data space address- es. In COM, RLC, SLA the operand is always the accumulator. Table 16. Arithmetic & Logic Instructions Notes: X,Y Index Registers V, W Short Direct Registers ∆ Affected # Immediate data (stored in ROM memory) * Not Affected rr Data space register Instruction Addressing Mode Bytes Cycles Flags ZC ADD A, (X) Indirect 1 4 ∆∆ ADD A, (Y) Indirect 1 4 ∆∆ ADD A, rr Direct 2 4 ∆∆ ADDI A, #N Immediate 2 4 ∆∆ AND A, (X) Indirect 1 4 ∆∆ AND A, (Y) Indirect 1 4 ∆∆ AND A, rr Direct 2 4 ∆∆ ANDI A, #N Immediate 2 4 ∆∆ CLR A Short Direct 2 4 ∆∆ CLR r Direct 3 4 * * COM A Inherent 1 4 ∆∆ CP A, (X) Indirect 1 4 ∆∆ CP A, (Y) Indirect 1 4 ∆∆ CP A, rr Direct 2 4 ∆∆ CPI A, #N Immediate 2 4 ∆∆ DEC X Short Direct 1 4 ∆ * DEC Y Short Direct 1 4 ∆ * DEC V Short Direct 1 4 ∆ * DEC W Short Direct 1 4 ∆ * DEC A Direct 2 4 ∆ * DEC rr Direct 2 4 ∆ * DEC (X) Indirect 1 4 ∆ * DEC (Y) Indirect 1 4 ∆ * INC X Short Direct 1 4 ∆ * INC Y Short Direct 1 4 ∆ * INC V Short Direct 1 4 ∆ * INC W Short Direct 1 4 ∆ * INC A Direct 2 4 ∆ * INC rr Direct 2 4 ∆ * INC (X) Indirect 1 4 ∆ * INC (Y) Indirect 1 4 ∆ * RLC A Inherent 1 4 ∆∆ SLA A Inherent 2 4 ∆∆ SUB A, (X) Indirect 1 4 ∆∆ SUB A, (Y) Indirect 1 4 ∆∆ SUB A, rr Direct 2 4 ∆∆ SUBI A, #N Immediate 2 4 ∆∆ 1 |
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