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R7KA8D2AFDCAC Fiches technique(PDF) 95 Page - Renesas Technology Corp |
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R7KA8D2AFDCAC Fiches technique(HTML) 95 Page - Renesas Technology Corp |
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95 / 292 page ![]() 1.07 1.06 ,....... 1.05 () 0 1.04 () 0 () () 1.03 1.02 1.01 All RKEEP bits PDRAMSCRO. are O RKEEP0~3 PDRAMSCRO. RKEEP0~7 PDRAMSCRO. PDRAMSCRO. PDRAMSCRO. RKEEP0~11 RKEEP0~12 RKEEP0~12 PDRAMSCR1. RKEEPO Name of PDRAM register bit set to 1 ■Average value of the tested middle samples during product evaluation. PDRAMSCRO. RKEEP0~12 PDRAMSCR1. RKEEP0,1 Figure 2.18 Software Standby current per SRAM state (ICC_DCDC, SS2LP_1, SVSCR_5) (reference data) The more practical ICC_DCDC value can be obtained with the following formula. ICC_DCDC = (IDD × VCL) / (VCC_DCDC × efficiency) Where: VCL and VCC are the voltage of VCL pin and VCC pin respectively, and efficiency is shown in the following figures. RA8D2 Datasheet 2. Electrical Characteristics R01DS0493EJ0130 Rev.1.30 Feb 27, 2026 Page 95 of 292 |
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