CD74HC173M datasheet(8/25 Pages) TI2

No de pièce	CD74HC173M

Description	CDx4HC173, CDx4HCT173 High-Speed CMOS Logic Quad D-Type Flip-Flop, Three- State

PDF	25 Pages

Scroll/Zoom	100%

Fabricant	TI2 [Texas Instruments]

Site Internet	https://www.ti.com

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6 Parameter Measurement Information

tPD is the maximum between tPLH and tPHL

tt is the maximum between tTLH and tTHL

NOTE: Outputs should be switching from 10% VCC to

90% VCC in accordance with device truth table. For

fMAX, input duty cycle = 50%

Figure 6-1. HC clock pulse rise and fall times and

pulse width

NOTE: Outputs should be switching from 10% VCC to

90% VCC in accordance with device truth table. FOr

fMAX, input duty cycle = 50%

Figure 6-2. HCT clock pulse rise and fall times and

pulse width

Figure 6-3. HC and HCU transition times and

propagation delay times, combination logic

Figure 6-4. HCT transition times and propagation

delay times, combination logic

CD54HC173, CD74HC173, CD54HCT173, CD74HCT173

SCHS158F – NOVEMBER 1998 – REVISED MARCH 2022

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CD74HC173M Fiches technique(PDF) 8 Page - Texas Instruments