XC6413 datasheet(13/20 Pages) TOREX

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XC6413/XC6414

Series

Cdelay

DELAY TIME (TYP.)

DELAY TIME

0.01μF

14msec

7 ~ 24.5msec

0.022μF

30.8msec

15.4 ~ 53.9msec

0.047μF

65.8msec

32.9 ~ 115.15msec

0.1μF

140msec

70 ~ 245msec

0.22μF

308msec

154 ~ 539msec

0.47μF

658msec

329 ~ 1151.5msec

1μF

1400msec

700 ~ 2450msec

VROUT

0.9 ~ 1.2V

1.3 ~ 1.7V

1.8 ~ 5.5V

More than 4.7μF

More than 2.2μF

More than 1.0μF

■

OPERATIONAL EXPLANATION

The voltage, divided by resistors R1 & R2 which are connected to the VROUT pin is compared with the internal reference

voltage by the error amplifier. The P-channel MOSFET, which is connected to the VROUT pin, is then driven by the

subsequent output signal. The output voltage at the VROUT pin is controlled & stabilized by negative feedback.

The current limit circuit and short circuit protection operate in relation to the level of output current. Further, the voltage

regulator's internal circuitry can be shutdown via the EN or CE pin's signal.

The series' detector function monitors the voltage divided by resistors R3 & R4 which are connected to the VROUT pin or the

VIN pin or the VSEN pin, as well as monitoring the voltage of the internal reference voltage source via the comparator. The

VDSEN pin has options (please refer to the Selection Guide, item 4). A 'High' or 'Low' signal level can be output from the

VDOUT pin when the VD pin voltage level goes below the detect voltage. The VD output logic has options (please refer to

the Selection Guide, item 5). As VDOUT is an open-drain N-channel output, a pull-up resistor of about 220kΩ is needed to

achieve a voltage output. Because of hysteresis at the detector function, output at the VDOUT pin will invert when the detect

voltage level increases above the release voltage (105% of the detect voltage). Even when the XC6413/14A, B, C, series

are in stand-by mode, the voltage detector function operates and the output voltage at VDOUT will output according to the

voltage level at VDSENSE voltage. For the XC6413/14A, B, C types, in stand-by, if a voltage of the recovery voltage is

present at the VROUT pin (from another power source), the VDOUT pin will be high impedance mode, and the pull up voltage

will be output at VDOUT. By connecting the Cdelay pin to a capacitor (Cd), the XC6413/14F series can apply a delay time to

VDOUT voltage when releasing voltage. The delay time can be calculated from the internal resistance, Rdelay (2MΩ, TYP.,

fixed) and the value of Cd as per the following equation.

Delay Time = Cdelay×Rdelay×0.7

With the XC6403/04 series regulator, a stable output voltage is achievable even if low ESR capacitors are used, as a phase

compensation circuit is built-in to the regulator. In order to ensure the effectiveness of the phase compensation, we suggest

that an output capacitor (CL) be connected as close as possible, between the output pin (VROUT) and the VSS pin. Please

use an output capacitor (CL) with a capacitance, based on the chart below. We also suggest an input capacitor (CIN) of 1

F : this should be connected between VIN and VSS in order to stabilize input power source.

The XC6413/14 series regulator offers a combination of current limit and circuit protection by means of a built-in fixed current

limiter circuit and a foldback circuit. When the load current reaches the current limit level, the fixed current limiter circuit

operates and output voltage drops. As a result of this drop in output voltage, the foldback circuit operates, the output voltage

drops further and output current decreases. When the output pin is shorted, a current of about 50mA flows.

The IC's internal regulator circuitry can be shut down via the signal from the EN pin with the XC6413/14A, B, C series. In

shutdown mode, output at the VROUT pin will be pulled down to the VSS level via R1 & R2. The whole IC's circuitry can be

shut down via CE pin with the XC6413/14D series and power consumption can be reduced to around 0μA (TYP.). While

the voltage detector is in shutdown mode, the voltage detector output is in a post-detection state. When choosing Detect L,

input current can be set by using the following formula.

Input Current = VIN voltage / Pull-Up Resistance

●

Delay Time Rdelay: 1.0 ~ 3.5MΩ, TYP:2.0MΩ

●

Output Capacitor Corresponding Chart

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