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STR910FAM32H6T Fiches technique(PDF) 84 Page - STMicroelectronics

No de pièce STR910FAM32H6T
Description  ARM966E-S??16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA
PDF  99 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STR910FAM32H6T Fiches technique(HTML) 84 Page - STMicroelectronics

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Electrical characteristics
STR91xFAx32 STR91xFAx42 STR91xFAx44
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7.12.4
I2C electrical characteristics
VDDQ = 2.7 - 3.6V, VDD = 1.65 - 2V, TA = -40 / 85 °C unless otherwise specified.
Table 44.
I2C electrical characteristics
Symbol
Parameter
Standard I2CFast I2C
Unit
MinMax
MinMax
tBUF
Bus free time between a STOP
and START condition
4.7
1.3
ms
tHD:STA
Hold time START condition.
After this period, the first clock
pulse is generated(1)
1.
The maximum hold time of the START condition has only to be met if the interface does not stretch the low
period of SCL signal
4.0
0.6
µs
tLOW
LOW period of the SCL clock
4.7
1.3
µs
tHIGH
HIGH period of the SCL clock
4.0
0.6
µs
tSU:STA
Set-up time for a repeated
START condition
4.7
0.6
µs
tHD:DAT
Data hold time(2)
2.
The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the
undefined region of the falling edge of SCL.
00
ns
tSU:DAT
Data set-up time
250
100
ns
tR
Rise time of both SDA and SCL
signals
1000
20+0.1Cb
(3)
3.
Cb = total capacitance of one bus line in pF
300
ns
tF
Fall time of both SDA and SCL
signals
300
20+0.1Cb
(3)
300
ns
tSU:STO
Set-up time for STOP condition
4.0
0.6
µs
Cb
Capacitive load for each bus
line
400
400
pF



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