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PCF85063TP Fiches technique(PDF) 3 Page - NXP Semiconductors |
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PCF85063TP Fiches technique(HTML) 3 Page - NXP Semiconductors |
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3 / 52 page ![]() PCF85063TP All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 4 — 6 May 2015 3 of 52 NXP Semiconductors PCF85063TP Tiny Real-Time Clock/calendar 7. Pinning information 7.1 Pinning 7.2 Pin description [1] The die paddle (exposed pad) is connected to VSS and should be electrically isolated. For mechanical details, see Figure 27. Fig 2. Pin configuration for HWSON8 (PCF85063TP) Table 4. Pin description Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified. Symbol Pin Type Description OSCI 1 input oscillator input OSCO 2 output oscillator output INT 3 output interrupt output (open-drain) VSS 4[1] supply ground supply voltage SDA 5 input/output serial data line SCL 6 input serial clock input CLKOUT 7 output clock output (push-pull) VDD 8 supply supply voltage |
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