Data Sheet

ADBMS6821/ADBMS6822

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

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Rev. B | 9 of 28

Figure 3. ADBMS6821 Pin Configuration

Table 15. ADBMS6821 Pin Function Descriptions

Pin Number

Mnemonic

Description

1

MSTR

SPI Mode Select. MSTR selects SPI controller mode (connected to VDDS) or peripheral mode (connected to GND).

2

PICO

SPI Controller Output (Controller Mode) or Peripheral Input (Peripheral Mode).

3

POCI

SPI Controller Input (Controller Mode) or Peripheral Output (Peripheral Mode).

4

SCK

SPI Clock Input (Controller) or Output (Peripheral).

5

CS

Active Low SPI Chip-Select Input (Controller Mode) or Output (Peripheral Mode).

6

VDDS

SPI Power-Supply Input (1.7 V to 5.5 V).

7

INTR

LPCM Interrupt Current-Limited Output.

8

WAKE

Device Wake-Up State Current-Limited Output or Input.

9

GND

Ground. The GND pins must be shorted together external to the IC.

10

IM

Isolated Interface Minus Input/Output.

11

IP

Isolated Interface Plus Input/Output.

12

VDD

isoSPI Power-Supply Input (3.0 V to 5.5 V).

13

VP

High Voltage Power-Supply Input (3.0 V to 30 V).

14

PHAPOL

Multilevel, Resistor Set SPI PHA/POL Selection Input.

15

RTO

Multilevel, Resistor Set LPCM Timeout Selection Input.

16

XCVRMD

Multilevel, Resistor Set Transceiver Mode Selection Input.

17 to 32

NIC

Not Internally Connected.

33

EP

Exposed Pad. Must be connected to GND.