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ST72682 Fiches technique(PDF) 8 Page - STMicroelectronics |
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ST72682 Fiches technique(HTML) 8 Page - STMicroelectronics |
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8 / 36 page ![]() Pin description ST72682 8/36 Table 2. Power supply pins Pin Pin name Description LQFP64 64 VSS_1 S Ground 63 VDD33_1 S I/Os and regulator supply voltage 45 VSS_2 S Ground 44 VDD33_2 S I/Os and regulator supply voltage 33 VSS_3 S Ground 32 VDD33_3 S I/Os and regulator supply voltage 18 VSS_4 S Ground 19 VDD33_4 S I/Os and regulator supply voltage 54 VSS_5 S Ground 53 VDD33_5 S I/Os and regulator supply voltage 17 VDDOUSB O USB2 PHY, OSC and PLL power supply output (1.8V) Table 3. Control and system Pin Pin name Level Description LQFP64 41 RESET I/O 3.3 CT Reset input with filter with internal pull-up Table 4. USB 2.0 Interface Pin Pin name Description LQFP64 16 VDDBL S Supply voltage for buffers and deserialisation flip flops (1.8 V) 15 VSSBL S Ground for buffers and deserialisation flip flops (1.8 V) 14 USBDM I/O USB2 DATA - 13 USBDP I/O USB2 DATA + 12 VDD3 S Supply voltage for the FS compliance (3.3 V) 11 VDDC S Supply voltage for DLL & XOR tree (1.8 V) 10 VSSC S Ground for DLL & XOR tree (1.8 V) 9 RREF I/O Ref. resistor for integrated impedance process adaptation (11.3 kOhms 1% Pull Down) |
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