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74LVC3G04DP Fiches technique(PDF) 13 Page - NXP Semiconductors |
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74LVC3G04DP Fiches technique(HTML) 13 Page - NXP Semiconductors |
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13 / 15 page  74LVC3G04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 5 October 2007 13 of 15 NXP Semiconductors 74LVC3G04 Triple inverter 14. Abbreviations 15. Revision history Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC3G04_5 20071005 Product data sheet - 74LVC3G04_4 Modifications: • In Section 10 “Static characteristics”, changed conditions for input leakage and supply current. 74LVC3G04_4 20070320 Product data sheet - 74LVC3G04_3 74LVC3G04_3 20050201 Product data sheet - 74LVC3G04_2 74LVC3G04_2 20041018 Product data sheet - 74LVC3G04_1 74LVC3G04_1 20040504 Product data sheet - - |
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