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74LVC3G04DP Fiches technique(PDF) 2 Page - NXP Semiconductors |
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74LVC3G04DP Fiches technique(HTML) 2 Page - NXP Semiconductors |
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2 / 15 page ![]() 74LVC3G04_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 5 October 2007 2 of 15 NXP Semiconductors 74LVC3G04 Triple inverter 3. Ordering information 4. Marking 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC3G04DP −40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74LVC3G04DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74LVC3G04GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74LVC3G04GM −40 °C to +125 °C XQFN8 plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 × 1.6 × 0.5 mm SOT902-1 Table 2. Marking Type number Marking code 74LVC3G04DP V04 74LVC3G04DC V04 74LVC3G04GT V04 74LVC3G04GM V04 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one driver) mna720 1A 1Y 17 2A 2Y 35 3A 3Y 62 7 1 1 1 5 3 mna721 1 2 6 mna110 A Y |
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