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STA5620 Fiches technique(PDF) 1 Page - STMicroelectronics |
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STA5620 Fiches technique(HTML) 1 Page - STMicroelectronics |
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1 / 29 page ![]() Preliminary Data This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. July 2007 Rev 1 1/29 1 STA5620 Fully integrated RF front-end for GPS Features ■ Low IF architecture (fIF = 4fO) ■ Minimum external components ■ VGA gain internally regulated ■ On chip programmable PLL ■ Typ. 2.7V supply voltage ■ SPI interface ■ 2kV HBM ESD protected ■ Compatible with GPS L1 ■ Standard QFN-32 package ■ Low power for portable designs Description The chip is a fully integrated RF front-end able to down-convert the GPS L1 signal from 1575.42MHz to 4.092MHz. The IF signal is converted by a two bit ADC. Sign (SIGN), Magnitude (MAG) and the 16.368MHz sampling clock (GPS_CLK) are provided to the baseband. The magnitude data is internally integrated in order to control the variable gain amplifiers in accordance to the RF input signal strength. An excellent quality of reception in critical environments is ensured by the good noise figure and linearity of the receiver. The on-chip oscillator supports crystal frequencies in the range of 10MHz to 40MHz. It is able to support TCXO providing also a buffered copy of the oscillator frequency. The chip, using STMicroelectronics BiCMOS SiGe technology, is housed in a QFN-32 package. VFQFPN-32L Table 1. Device summary Order code Marking Package Packing STA5620TR STA5620 VFQFPN-32L Tape & reel www.st.com |
Numéro de pièce similaire - STA5620 |
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