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PCAL6408APW Fiches technique(PDF) 21 Page - NXP Semiconductors |
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PCAL6408APW Fiches technique(HTML) 21 Page - NXP Semiconductors |
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21 / 59 page ![]() NXP Semiconductors PCAL6408A Low-voltage translating, 8-bit I2C-bus/SMBus I/O expander with interrupt output, reset, and configuration registers 002aah278 LED VDD(P) Pn VDD Figure 17. High-value resistor in parallel with the LED 002aah279 LED VDD(P) Pn 3.3 V 5 V Figure 18. Device supplied by a lower voltage 9.2 Output drive strength control The Output drive strength registers allow the user to control the output drive level of the GPIO. Each GPIO can be configured independently to one of the four possible output current levels. By programming these bits the user is changing the number of transistor pairs or ‘fingers’ that drive the I/O pad. Figure 19 shows a simplified output stage. The behavior of the pad is affected by the Configuration register, the output port data, and the current control register. When the Current Control register bits are programmed to 10b, then only two of the fingers are active, reducing the current drive capability by 50 %. PCAL6408A All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 3.3 — 14 October 2024 Document feedback 21 / 59 |
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