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ADC3908CSSS Fiches technique(PDF) 30 Page - Texas Instruments |
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ADC3908CSSS Fiches technique(HTML) 30 Page - Texas Instruments |
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30 / 47 page ![]() 7.4 Device Functional Modes 7.4.1 Normal Operation In normal operating mode, the entire ADC full scale range gets converted to a digital output with 8-bit resolution. The output is available in as little as 1 clock cycle on the digital CMOS outputs. 7.4.2 Power Down The ADC3908Dx and ADC3908Sx can be put into power down mode when PDN pin is pulled high. ADC3908D025, ADC3908D065, ADC3908D125 ADC3908S025, ADC3908S065, ADC3908S125 SBASAU9 – OCTOBER 2024 www.ti.com 30 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: ADC3908D025 ADC3908D065 ADC3908D125 ADC3908S025 ADC3908S065 ADC3908S125 |
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