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LT1010CDD Fiches technique(PDF) 3 Page - Linear Technology

No de pièce LT1010CDD
Description  Fast 짹150mA Power Buffer
PDF  20 Pages
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Fabricant  LINER [Linear Technology]
Site Internet  http://www.linear.com
Logo LINER - Linear Technology

LT1010CDD Fiches technique(HTML) 3 Page - Linear Technology

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LT1010
1010fc
SYMBOL
PARAMETER
CONDITIONS (Note 4)
MIN
TYP
MAX
UNITS
VSOS+
Positive Saturation Offset
IOUT = 0 (Note 5)
1.0
V
1.1
V
VSOS–
Negative Saturation Offset
IOUT = 0 (Note 5)
0.2
V
0.3
V
RSAT
Saturation Resistance
IOUT = ±150mA (Note 5)
22
28
VBIAS
Bias Terminal Voltage
RBIAS = 20Ω (Note 6)
700
840
mV
560
880
mV
IS
Supply Current
IOUT = 0, IBIAS = 0
9
mA
10
mA
ELECTRICAL CHARACTERISTICS The indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (See Note 4. Typical values in curves.)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: For case temperatures above 25
°C, dissipation must be derated
based on a thermal resistance of 25
°C/W for the T package, 130°C/W for
the N8 package and 40
°C/W for the DD package for ambient temperatures
above 25
°C. See Applications Information.
Note 3: In current limit or thermal limit, input current increases sharply
with input-output differentials greater than 8V; so input current must be
limited. Input current also rises rapidly for input voltages 8V above V + or
0.5V below V .
Note 4: Specifications apply for 4.5V
≤ VS ≤ 40V,
V + 0.5V
≤ VIN ≤ V+ – 1.5V and IOUT = 0, unless otherwise stated.
Temperature range is 0
°C ≤ TJ ≤ 100°C, TC ≤ 100°C.
Note 5: The output saturation characteristics are measured with 100mV
output clipping. See Applications Information for determining available
output swing and input drive requirements for a given load.
Note 6: The output stage quiescent current can be increased by
connecting a resistor between the BIAS pin and V+. The increase is
equal to the bias terminal voltage divided by this resistance.
Note 7: Thermal resistance varies depending upon the amount of PC board
metal attached to the pin (Pin 9) of the device.
θJA is specified for a certain
amount of 1oz copper metal trace connecting to Pin 9 as described in the
thermal resistance tables in the Applications Information section.



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