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MPC862P Fiches technique(PDF) 43 Page - Freescale Semiconductor, Inc |
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MPC862P Fiches technique(HTML) 43 Page - Freescale Semiconductor, Inc |
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43 / 88 page ![]() MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3 Freescale Semiconductor 43 Bus Signal Timing Figure 33 shows the reset timing for the data bus configuration. Figure 33. Reset Timing—Configuration from Data Bus Figure 34 provides the reset timing for the data bus weak drive during configuration. Figure 34. Reset Timing—Data Bus Weak Drive during Configuration HRESET RSTCONF D[0:31] (IN) R71 R74 R73 R75 R76 CLKOUT HRESET D[0:31] (OUT) (Weak) RSTCONF R69 R79 R77 R78 |
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