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PCF8820 Fiches technique(PDF) 13 Page - NXP Semiconductors |
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PCF8820 Fiches technique(HTML) 13 Page - NXP Semiconductors |
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13 / 60 page ![]() 2000 Dec 07 13 Philips Semiconductors Product specification 67 × 101 Grey-scale/ECB colour dot matrix LCD driver PCF8820 7.17 DDRAM addressing Data is written in 8-bit bytes into the display data RAM matrix of the PCF8820 (see Figs 6 to 8). The display data RAM comprises a matrix of 67 × 101 × 2 bits. The columns are addressed by the address pointer. The address ranges are: X = 0 to 100 (64H) and Y=0to16 (10H). It should be noted that only 3 rows are addressed in bank 16. Addresses outside these ranges are not allowed. Bit MX (see Table 3) enables or disables horizontal address space mirroring: • When bit MX = 0, mirroring is disabled. The address corresponds to Col0 (see Fig.7). • When bit MX = 1, mirroring is enabled and address X = 0 corresponds to Col0 (see Fig.8). Bit MX determines how data is written to the RAM. If bit MX is changed after writing data to the RAM, no change on the display will be visible. handbook, full pagewidth MGT119 0 100 X address Col0 LSB MSB 0 16 Y address Fig.7 RAM X-address format for mirroring disabled. handbook, full pagewidth MGT120 X address Col0 LSB MSB 0 16 Y address 100 0 Fig.8 RAM X-address format for mirroring enabled. |
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