VC0736 datasheet(33/127 Pages) NEXTCHIP

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NVP6124

Data sheet

02.11.2015 (REV 0.2)

31/125

4-CH AHD2.0 RX and 9-CH Audio Codec

3.2.3. 2/4/8/16-Channel Audio Data Output with 2-Channel Mic Data(320 fs)

ADATA_REC supports up to 9 channels(8-Ch audio/1-Ch mic) using single chip and up to 18

channel(16-Ch audio/2-Ch mic) in cascade mode. In this case, the bitrate of the audio signal

should be 320 fs(RM_BITRATE, 0x07[5:4], BANK1).

The number of output channel is configured by internal register value (R_MULTCH, 0x08[1:0],

BANK1) and the order of output channel is configured by internal register value (R_SEQ, 0x09

~ 0x12, / MIC_SEQ, 0x3C ~ 0x3D, BANK1). Therefore, the order of audio output can be

changed.

ASYNCR

ADATAR

CH1

CH2

CH3

CH4

CH5

CH6

CH7

CH8

MIC1

N.A

CH9

CH10

CH11

CH12

CH13

CH14

ADATAR

(R_MULTCH=0)

(R_MULTCH=1)

(R_MULTCH=2)

ADATAR

CH15

CH16

MIC2

N.A

(R_MULTCH=3)

CH1

CH2

CH3

CH4

MIC1

N.A

CH9

CH10

CH11

CH12

MIC2

N.A

CH1

MIC1

N.A

CH9

MIC2

N.A

CH1

CH2

MIC1

N.A

CH9

CH10

MIC2

N.A

* N.A = No Audio

Figure 3.6 audio 2/4/6/8/16 channel data output(with 2 channel mic) <I2S mode, 320fs>

ADATAR

ASYNCR

ADATAR

(R_MULTCH=0)

(R_MULTCH=1)

(R_MULTCH=2)

(R_MULTCH=3)

CH1

CH2

CH3

CH4

CH5

CH6

CH7

CH8

CH9

CH10

CH11

CH12

CH13

CH14

CH15

CH16

MIC1

N.A

MIC2

N.A

CH1

CH2

CH3

CH4

CH5

CH6

CH7

CH8

MIC1

N.A

MIC2

N.A

CH1

CH2

CH3

CH4

MIC1

N.A

MIC2

N.A

CH1

CH2

MIC1

N.A

MIC2

N.A

* N.A = No Audio

Figure 3.7. audio 2/4/8/16 channel data output(with 2 channel mic) <DSP/SSP mode, 320fs>

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